SIMULIA CST Studio Suite 2024 – What’s New

Antenna and RF component design

• Sequentially executed excitation lists: The T-solver now enables the sequential excitation of multiple simultaneous excitation lists, enhancing automation in array workflows and making it suitable for Distributed Computing applications.

Note that Sweepable Excitation Lists are still available for a Parameter

• Key improvements to the Domain Decomposition Solver for Antenna Arrays include(DDM)
  • Scalability: load balance of available cores
  • MPI: stability and scalability
  • Robustness: very high success rate

• Enhancements for non-parametric optimization strategies
  • Topology Optimization: The purpose is to find function.
    • The design space can be a sheet or a volume.
    • After optimization the mesh elements will consist of either the original material or the material specified for filling.

• Shape Optimization: The purpose is to achieve high performance.
  • The design space must be a surface area.
  • After optimization the mesh nodes on the design space will be moved to form a new shape.

Electronics / EDA:

• PCB Import:
  • Reimport PCB: the user can reimport a similar PCB while keeping all the simulation setup

  

  • Port type per component: the user can define different types of port for individual components now both in GUI and python.

  

  • Multi-pin lumped element: the multi-pin lumped element with TS and SPICE vendor models can be imported into 3D directly.

  

  • Material definition: othe users can define new materials and apply to PCB in EDA import dialog.

  

  • Layout Version Schematic (LVS): In the EDA import dialog, we have the capability to verify the logical connection of pins against their physical connection. Upon selecting Preview, an “x” will be shown in the LVS column if there are violations, indicating either all pins of a net being connected or no pins of different nets being connected.

  

  • IPC-2581—C bending and stack up region: supports IPC-2581-C including stackup regions and bending.

  

  • Transform PCB attributes: This feature is useful when the user would like to modify an imported PCB or create a new PCB in PCBS.

  

SIGNAL INTEGRITY:

• DDR4 Net Selection: users can run DDR4 analysis for selected nets without manual work or workaround.



• DDR4 ODT Sweep: users can run model selector sweep in DDR4 Analysis.



• Line impedance plot: Users can plot the line impedance on the geometry to see any impedance problems that need to be addressed.



• Statistical 2D Eye Diagram in EAT:
  • Eye diagrams are generated in two ways:
    • Wrapping waveforms
    • Direct from system response (i.e., step response)
  • CST Version 2023 eye analysis task (EAT) supports only the transient mode for eye diagram generation by wrapping waveforms. V2024 will support both methods, transient and IBIS-AMI tasks. Users can select step, pulse, or impulse for the system response.

POWER INTEGRITY:

• Virtual Component: oIn the past, users were unable to create a voltage regulator for a DC-DC converter to use in an IR-Drop simulation. V2024 changes this. A virtual component will be defined and used for the voltage regulator.



• Sense location analysis: Power supplies typically feature a sense pin that provides voltage feedback from a specific point on the PCB. When dealing with more than two power consumers, determining the optimal location for this sense pin becomes crucial. V2024 offers an analysis tool specifically designed for this purpose. By utilizing the IR-Drop solver, users can conduct a sense line analysis to pinpoint the ideal location for the sense pin.

MULTIPHYSICS SIMULATION:

• 2D Planar loss import: All thermal solvers will now accommodate losses generated from simulations using a 2D planar mesh. Users can now perform motor thermal simulation.



• Dynamic fan speed: Fan can adjust its speed based on temperature readings at a monitor point.



• Solar radiation: Solar radiation feature in V2024 release helps calculating the thermal impact of solar radiation on the system.

ELECTROMAGNETIC COMPATIBILITY:

• Improved sampling
  • New S-Parameter sampling scheme for the FD solver (lin-log).
  • No re-sampling of S-Parameters when used for Vector Fitting in DES.
  • Time gating + Hamming window on by default for periodic signals.
  • Field probes after combining results use sampling defined in DES
  • Automatic Sampling for Transient Task FFT.



• New Signal Definitions
  • All time signal definitions for transient tasks have been reworked.
  • Improved usability of spread spectrum definition.

CABLE SIMULATION:

• GUI enhancements:
  • Multi-editing allows changing the impedance value of several ports.
  • New port button clearly distinguishes between the creation of single-ended ports and differential ports.

  

  • Cable Junctions are needed to define the loadings on the cable endings.
  • Now, these junctions have a representation in the Navigation tree and in the 3D view. This makes it much easier for users to define the simulation setup.

  

• Cable simulation with ports: Cable ports instead of pins
  • Reduce the number of pins of the schematic block, no mixing of ports and CS pins.
  • Can run without a schematic setup. Cable port results and current monitor results directly in the 3D navigation tree.
  • Cable and 3D ports can be used for a common S-Parameter simulation.
  • Combine results, MPI, DC



• Support for coated wires:
  • For mechanical stability, wires are often coated.
  • The coating leads to a changed frequency-dependent conductivity of the wires.
  • Single material coating supported in CST Studio Suite 2024

We Urge You To Call Us For Any Doubts & Clarifications That You May Have. We Are Eager to Talk To You

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